x86_x64 Namespace Reference

Namespaces
	AMD
	CPUID2
	CPUID4

Classes
struct	Cache
struct	CpuidRegs
	registers used/returned by cpuid More...
class	ScopedSetPriority
class	StringStripper
	functor to remove substrings from the CPU identifier string More...

Enumerations
enum	IdxCache {   L1D = 1, L2D, L3D, L4D,   L1I, L2I, L3I, L4I,   TLB }
enum	Vendors { VENDOR_UNKNOWN, VENDOR_INTEL, VENDOR_AMD }
	CPU vendor. More...
enum	Models {   MODEL_NEHALEM_EP = 0x1A, MODEL_NEHALEM_EP_2 = 0x1E, MODEL_I7_I5 = 0x1F, MODEL_CLARKDALE = 0x25,   MODEL_WESTMERE_EP = 0x2C, MODEL_NEHALEM_EX = 0x2E, MODEL_WESTMERE_EX = 0x2F, MODEL_SANDY_BRIDGE = 0x2A,   MODEL_SANDY_BRIDGE_2 = 0x2D }
enum	Caps {   CAP_SSE3 = 0+0, CAP_EST = 0+7, CAP_SSSE3 = 0+9, CAP_SSE41 = 0+19,   CAP_SSE42 = 0+20, CAP_FPU = 32+0, CAP_TSC = 32+4, CAP_MSR = 32+5,   CAP_CMOV = 32+15, CAP_TM_SCC = 32+22, CAP_MMX = 32+23, CAP_SSE = 32+25,   CAP_SSE2 = 32+26, CAP_HT = 32+28, CAP_AMD_CMP_LEGACY = 64+1, CAP_AMD_MP = 96+19,   CAP_AMD_MMX_EXT = 96+22, CAP_AMD_3DNOW_PRO = 96+30, CAP_AMD_3DNOW = 96+31 }
	bit indices of CPU capability flags (128 bits). More...

Functions
static void	AddCache (const x86_x64::Cache &cache)
static void	AddTLB (const x86_x64::Cache &tlb)
static Status	DetectCacheAndTLB ()
const x86_x64::Cache *	Caches (size_t idxCache)
static void	Invoke_cpuid (CpuidRegs *regs)
static Status	InitCpuid ()
bool	cpuid (CpuidRegs *regs)
	invoke CPUID instruction. More...
static Status	InitCaps ()
bool	Cap (Caps cap)
void	GetCapBits (u32 *d0, u32 *d1, u32 *d2, u32 *d3)
static Status	InitVendor ()
Vendors	Vendor ()
static Status	InitSignature ()
size_t	Model ()
size_t	Family ()
static Status	InitIdentifierString ()
static const char *	IdentifierString ()
u64	rdtsc ()
void	DebugBreak ()
	trigger a breakpoint inside this function when it is called. More...
double	ClockFrequency ()
	measure the CPU clock frequency via rdtsc and timer_Time. More...
LIB_API size_t	Generation ()

Variables
static const size_t	maxTLBs = 2*2*4
static size_t	numTLBs = 0
static const size_t	numCaches = x86_x64::Cache::maxLevels * 2 + maxTLBs
static Cache	caches [numCaches]
static u32	cpuid_maxFunction
static u32	cpuid_maxExtendedFunction
static u32	caps [4]
static ModuleInitState	capsInitState
static Vendors	vendor
static size_t	model
static size_t	family
static ModuleInitState	signatureInitState
static char	identifierString [48+1]

Enumeration Type Documentation

enum x86_x64::Caps

bit indices of CPU capability flags (128 bits).

values are defined by IA-32 CPUID feature flags - do not change!

Enumerator
CAP_SSE3
CAP_EST
CAP_SSSE3
CAP_SSE41
CAP_SSE42
CAP_FPU
CAP_TSC
CAP_MSR
CAP_CMOV
CAP_TM_SCC
CAP_MMX
CAP_SSE
CAP_SSE2
CAP_HT
CAP_AMD_CMP_LEGACY
CAP_AMD_MP
CAP_AMD_MMX_EXT
CAP_AMD_3DNOW_PRO
CAP_AMD_3DNOW

enum x86_x64::IdxCache

Enumerator
L1D
L2D
L3D
L4D
L1I
L2I
L3I
L4I
TLB

enum x86_x64::Models

Enumerator
MODEL_NEHALEM_EP
MODEL_NEHALEM_EP_2
MODEL_I7_I5
MODEL_CLARKDALE
MODEL_WESTMERE_EP
MODEL_NEHALEM_EX
MODEL_WESTMERE_EX
MODEL_SANDY_BRIDGE
MODEL_SANDY_BRIDGE_2

enum x86_x64::Vendors

CPU vendor.

(this is exposed because some CPUID functions are vendor-specific.) (an enum is easier to compare than the original string values.)

Enumerator
VENDOR_UNKNOWN
VENDOR_INTEL
VENDOR_AMD

Function Documentation

static void x86_x64::AddCache ( const x86_x64::Cache &  cache )

static

static void x86_x64::AddTLB ( const x86_x64::Cache &  tlb )

static

LIB_API const Cache * x86_x64::Caches

(

size_t

idxCache

)

Returns

0 if idxCache >= TLB+numTLBs, otherwise a valid pointer to a Cache whose numEntries is 0 if disabled / not present.

LIB_API bool x86_x64::Cap

(

Caps

cap

)

Returns

whether the CPU supports the indicated Cap / feature flag.

LIB_API double x86_x64::ClockFrequency

(

)

measure the CPU clock frequency via rdtsc and timer_Time.

(it follows that this must not be called from WHRT init.) this takes several milliseconds (i.e. much longer than os_cpu_ClockFrequency) but delivers accurate measurements.

LIB_API bool x86_x64::cpuid

(

CpuidRegs *

regs

)

invoke CPUID instruction.

Parameters

regs

input/output registers. regs->eax must be set to the desired function. some functions (e.g. 4) require regs->ecx to be set as well. rationale: this interface (input/output structure vs. function parameters) avoids unnecessary copying/initialization if some inputs aren't needed and allows graceful expansion to functions that require further inputs.

Returns

true on success or false if the sub-function isn't supported.

LIB_API void x86_x64::DebugBreak

(

)

trigger a breakpoint inside this function when it is called.

static Status x86_x64::DetectCacheAndTLB ( )

static

LIB_API size_t x86_x64::Family

(

)

LIB_API size_t x86_x64::Generation

(

)

Returns

the colloquial processor generation (5 = Pentium, 6 = Pentium Pro/II/III / K6, 7 = Pentium4 / Athlon, 8 = Core / Opteron)

LIB_API void x86_x64::GetCapBits	(	u32 *	d0,
		u32 *	d1,
		u32 *	d2,
		u32 *	d3
	)

static const char* x86_x64::IdentifierString ( )

static

static Status x86_x64::InitCaps ( )

static

static Status x86_x64::InitCpuid ( )

static

static Status x86_x64::InitIdentifierString ( )

static

static Status x86_x64::InitSignature ( )

static

static Status x86_x64::InitVendor ( )

static

static void x86_x64::Invoke_cpuid ( CpuidRegs *  regs )

static

LIB_API size_t x86_x64::Model

(

)

LIB_API u64 x86_x64::rdtsc

(

)

Returns

the current value of the TimeStampCounter (a counter of CPU cycles since power-on, which is useful for high-resolution timing but potentially differs between multiple CPUs)

notes:

• a macro avoids call overhead, which is important for TIMER_ACCRUE.
• x64 RDTSC writes to edx:eax and clears the upper halves of rdx and rax.

LIB_API Vendors x86_x64::Vendor

(

)

Variable Documentation

Cache x86_x64::caches[numCaches]

static

u32 x86_x64::caps[4]

static

ModuleInitState x86_x64::capsInitState

static

u32 x86_x64::cpuid_maxExtendedFunction

static

u32 x86_x64::cpuid_maxFunction

static

size_t x86_x64::family

static

char x86_x64::identifierString[48+1]

static

const size_t x86_x64::maxTLBs = 2*2*4

static

size_t x86_x64::model

static

const size_t x86_x64::numCaches = x86_x64::Cache::maxLevels * 2 + maxTLBs

static

size_t x86_x64::numTLBs = 0

static

ModuleInitState x86_x64::signatureInitState

static

Vendors x86_x64::vendor

static