23 #ifndef INCLUDED_X86_X64_CACHE 24 #define INCLUDED_X86_X64_CACHE 88 if(!(1 <= level && level <= maxLevels))
98 if(associativity != 0)
107 if(associativity == 0 || associativity > fullyAssociative)
144 #endif // #ifndef INCLUDED_X86_X64_CACHE
const x86_x64::Cache * Caches(size_t idxCache)
Definition: cache.cpp:649
Type type
never kNull
Definition: cache.h:52
Type
Definition: cache.h:30
static const size_t fullyAssociative
Definition: cache.h:42
uint64_t u64
Definition: types.h:40
u64 TotalSize() const
Definition: cache.h:116
#define ENSURE(expr)
ensure the expression <expr> evaluates to non-zero.
Definition: debug.h:287
size_t sharedBy
how many logical processors share this cache?
Definition: cache.h:72
static const size_t maxLevels
Definition: cache.h:40
void Initialize(size_t level, Type type)
Definition: cache.h:74
size_t level
1..maxLevels
Definition: cache.h:47
size_t numEntries
if 0, the cache is disabled and all other values are zero
Definition: cache.h:57
IdxCache
Definition: cache.h:122
size_t associativity
= fullyAssociative or the actual ways of associativity
Definition: cache.h:67
bool Validate() const
Definition: cache.h:86
size_t entrySize
NB: cache entries are lines, TLB entries are pages.
Definition: cache.h:62